DATE: The legacy of Mead and Conway
What is the legacy of the most famous textbook in the world of chip design: Mead and Conway’s Introduction to VLSI Systems? Although some of the core assumptions of Carver Mead and Lynn Conway’s book...
View ArticleDATE: SoC prototyping ascends the learning curve
A panel at DATE 2013 in Grenoble heard from a combination of EDA vendors and users (including a leading FPGA vendor) that the increasing number of prototyping techniques has once more put the business...
View ArticleAccellera publishes SystemC-AMS 2.0 standard
Accellera Systems Initiative has published the language reference manual for the latest version of its mixed-signal simulation environment based on SystemC. Version 2.0 of SystemC-AMS adds support for...
View ArticleDATE: Early shift to finFET processes challenges IP development strategies
An early shift to finFET-based processes (Guide) is making the process of developing supporting IP libraries more challenging, according to Joachim Kunkel, senior vice president and general manager of...
View ArticleDATE: The real causes of carbon nanotube FET performance variation
The performance of carbon nanotube FETs is more affected by the way that the nanotubes are grown and deposited than by the traditional sources of variation in silicon-based devices, according to the...
View ArticleDATE: The rise of the power architect
The challenge of meeting declining power budgets has seen a new breed of architect emerge alongside the system architect and the design manager. The power architect may have an architectural...
View ArticleDATE: Double patterning and finFETs force flexibility on tools
Double patterning and finFETs are on the horizon. Until production starts, EDA companies such as Synopsys are having to plan for the different ways in which these technologies will be used as their...
View ArticleDATE: ARM proposes ‘unit of compute’ as basis for energy-efficient systems
ARM used a keynote at DATE this week to propose a basic ‘unit of compute’ that could be used to build more energy-efficient computation systems for applications ranging from mobile phones to...
View ArticleDATE: Silicon Europe plans to build cluster of clusters
Four European centers for electronics research and business development have set up a project to try to create a virtual “silicon cluster” that aims ultimately to build a worldwide development network...
View ArticleThe wrong units of compute
“We are not using system the right way and not building the right systems in the first place,” claimed Christos Kozyrakis, associate professor at Stanford University, at the recent DATE conference in...
View ArticleIntel and ST stake claims to foundry low power designs
With both Intel and STMicroelectronics looking to offer foundry access to, respectively, their finFET (aka, in Intel’s case, tri-gate) and fully-depleted silicon on insulator (FDSOI) technologies, both...
View ArticleSoC prototyping ascends the learning curve
A panel at DATE 2013 in Grenoble heard from a combination of EDA vendors and users (including a leading FPGA vendor) that the increasing number of prototyping techniques has once more put the business...
View ArticleAccellera publishes SystemC-AMS 2.0 standard
Accellera Systems Initiative has published the language reference manual for the latest version of its mixed-signal simulation environment based on SystemC. Version 2.0 of SystemC-AMS adds support for...
View ArticleDATE: Early shift to finFET processes challenges IP development strategies
An early shift to finFET-based processes (Guide) is making the process of developing supporting IP libraries more challenging, according to Joachim Kunkel, senior vice president and general manager of...
View ArticleDATE: The real causes of carbon nanotube FET performance variation
The performance of carbon nanotube FETs is more affected by the way that the nanotubes are grown and deposited than by the traditional sources of variation in silicon-based devices, according to the...
View ArticleDATE: The rise of the power architect
The challenge of meeting declining power budgets has seen a new breed of architect emerge alongside the system architect and the design manager. The power architect may have an architectural...
View ArticleDATE: Double patterning and finFETs force flexibility on tools
Double patterning and finFETs are on the horizon. Until production starts, EDA companies such as Synopsys are having to plan for the different ways in which these technologies will be used as their...
View ArticleDATE: ARM proposes ‘unit of compute’ as basis for energy-efficient systems
ARM used a keynote at DATE this week to propose a basic ‘unit of compute’ that could be used to build more energy-efficient computation systems for applications ranging from mobile phones to...
View ArticleDATE: Silicon Europe plans to build cluster of clusters
Four European centers for electronics research and business development have set up a project to try to create a virtual “silicon cluster” that aims ultimately to build a worldwide development network...
View ArticleIntel and ST stake claims to foundry low power designs
With both Intel and STMicroelectronics looking to offer foundry access to, respectively, their finFET (aka, in Intel’s case, tri-gate) and fully-depleted silicon on insulator (FDSOI) technologies, both...
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